1. Field of the Invention
This invention relates to charge transfer devices (CTD) and, more specifically, to charge transfer devices having a stepped insulator and the method of making same.
2. Description of the Prior Art
The prior art charge transfer devices and, particularly, charge imaging devices (CID) have generally been formed on a mercury cadmium telluride (HgCdTe) substrate, normally of n-type and optionally disposed on a silicon base. An anodic passivating layer is formed on the HgCdTe substrate with a subsequent layer of zinc sulfide thereon followed by a gate layer of electrical conductor such as aluminum or nickel and then followed by a further zinc sulfide layer. A via is then etched through the upper zinc sulfide layer to the electrically conductive layer to provide access to the electrically conductive layer from the exterior of the device. A bonding pad is then formed over the top zinc sulfide layer extending through the via to the electrically conductive layer. Though these prior art CID arrays have operated satisfactorily, individual devices have often been found to be short circuited between the HgCdTe substrate and the electrically conductive layer after addition of electrically conductive material into the vias, thereby decreasing the yield. It is believed that this problem arises due to pin holes found in the electrically conductive layer which permits the etchant for the zinc sulfide to pass therethrough and also etch an unwanted via in the zinc sulfide layer formed directly over the HgCdTe substrate. In addition, it is known that HgCdTe devices are incapable of operating at high voltages and it is desirable in the case of CID arrays to have a large operating voltage range in order to be able to clearly define the active region of the device from the channel. This has remained a problem with HgCdTe devices.